Current computer architectural testing often involves comparing the results of instructions executed on a reference model and instructions executed on a behavioral model. A microcode based machine is one in which a user visible instruction (macroinstruction) is broken down into a sequence of microinstructions that emulate the behavior of the macroinstruction, and are not directly visible to the user. On a microcode based machine, such testing is completed without microinstruction modeling or checking. Because current systems do not include modeling on the microinstruction level, current systems are only capable of checking the behavioral model on the macroinstruction boundaries in the emulated instruction set, or on transitions between the microinstruction set and native mode instruction set. In addition, current systems have not been able to verify the correctness of the microinstruction sequence and control (aliasing) information. Furthermore, current microcode simulators can only execute microinstructions without faults or traps, or other dynamic information. These simulators were designed for performance analysis rather than checking correctness.